A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...

CMOS technology has dominated the IC business for the last 25 years and will continue to do so for another 25 years, according to the author of CMOS Circuit Design, Layout, and Simulation. He explains ...

This week, Google unveiled its AlphaChip reinforcement learning method for designing chip layouts. The AlphaChip AI promises to substantially speed up the design of chip floorplans and make them more ...

As we all know, the back-end design of layout implementation known as integrated circuit (IC) layout — is simplistically divided into ASIC-style flow and full-custom flow. This article will try to ...

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...

Low-voltage CMOS analog circuit design has emerged as a critical area of research, driven by the dual imperatives of energy efficiency and high-performance signal processing. This discipline focuses ...

Logical- and physical-synthesis tools have revolutionized digital-ASIC design over the past decade, increasing chip functions and designer productivity. However, many of today's SOC (system-on-chip) ...

MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process ...